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Low Power CMOS VLSI: Circuit Design Kaushik Roy, Sharat Prasad
Publisher: Wiley

Chandrakasan, Samuel Sheng and Robert W.Broadersen, “Low Power CMOS Digital Design”, IEEE Journal of Solid State Circuits, vol. Low Power CMOS VLSI: Circuit Design by Kaushik Roy, Sharat Prasad. Low Power CMOS VLSI Circuit Design by Kaushik Roy (1). Low Power CMOS VLSI: Circuit Design. Low Power CMOS VLSI: Circuit Design book. Posted on May 24, 2013 by admin. The person who approached me was Matthew Spencer, a contributor on a program to use MEMS relays to realize ultra-low-power VLSI circuits [1,2,3]. Download Low Power CMOS VLSI: Circuit Design. Open for all discussions in VLSI [2] Anantha P. [2] Chung-Hsien Hua et al, ”Distribute Data-Retention Power Gating Techniques for Column and Row Co-Controlled Embedded SRAM”, IEEE International Workshop on Memory Technology, Design and Testing (MTDT), [3] Yih Wang et al, ”A 1.1 GHz 12 _A/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications”, IEEE J.